Expired
Milestone
Apr 1, 2020–Jun 30, 2020
ALM generators for SAT/SMT
Milestone ID: 14
Build formal description of a logical ALM primitive for Intel Stratix-10 FPGA in the form suitable for satisfiability problem solvers with the standard or customized SAT/SMT solvers
All issues for this milestone are closed. You may close this milestone now.